fbpx
Wikipedia

Process–architecture–optimization model

Process–architecture–optimization is a development model for central processing units (CPUs) that Intel adopted in 2016. Under this three-phase (three-year) model, every microprocessor die shrink is followed by a microarchitecture change and then by one or more optimizations. It replaced the two-phase (two-year) tick–tock model that Intel adopted in 2006. The tick–tock model was no longer economically sustainable, according to Intel, because production of ever smaller dies becomes ever more costly.[1][2][3][4][5]

Roadmap

Wave[6] Process
(die shrink)
Architecture Optimizations Optional
backport[7][8]
1:
14 nm
2014:
Broadwell
(5th gen)
2015:
Skylake
(6th gen)
2016:
Kaby Lake
(7th gen)
2017:
Coffee Lake
(8th gen)
2018:
Coffee Lake Refresh
(9th gen)
2019:
Comet Lake
(10th gen)
2021:
Rocket Lake
(11th gen, Cypress Cove)
References:[1][3][6][9]
2:
10 nm
(Intel 7)
2018:[note 1]
Cannon Lake
(8th gen, Palm Cove)
2019:
Ice Lake
(10th gen, Sunny Cove)
2020:
Tiger Lake
(11th gen, Willow Cove)
2021:
Alder Lake
(12th gen, Golden Cove)
2022:
Raptor Lake
(13th gen)
References:[1][10][9][11][12]
3:
Intel 4
2023:
Meteor Lake
(14th gen)
References:[13]
3:
Intel 20A
and
Intel 18A
2024:
Arrow Lake
(15th gen)
Lunar Lake
(16th gen)
References [14]

See also

Notes

  1. ^ Cannon Lake: only 1 CPU released, microarchitecture dumped 1.5 year later.

References

  1. ^ a b c Tick Tock On The Rocks: Intel Delays 10nm, Adds 3rd Gen 14nm Core Product "Kaby Lake". AnandTech. 16 July 2015.
  2. ^ Cutress, Ian. "Intel's 'Tick-Tock' Seemingly Dead, Becomes 'Process-Architecture-Optimization'".
  3. ^ a b eTeknix.com (23 March 2016). "Intel Ditches 'Tick-Tock' for 'Process-Architecture-Optimization' - eTeknix".
  4. ^ "Intel Tick-Tock Processor Model Replaced With Process-Architecture-Optimization - Legit Reviews". 23 March 2016.
  5. ^ "Intel 7th Gen Core: Process Architecture Optimization". 30 August 2016.
  6. ^ a b Intel Launches 7th Generation Kaby Lake: 15W/28W with Iris, 35-91W Desktop and Mobile Xeon - 03 January 2017.
  7. ^ Cutress, Dr Ian. "Intel's Manufacturing Roadmap from 2019 to 2029: Back Porting, 7nm, 5nm, 3nm, 2nm, and 1.4 nm". www.anandtech.com. Retrieved 2021-03-15.
  8. ^ December 2019, Arne Verheyde 11 (11 December 2019). "Intel Process Roadmap Shows 1.4nm in 2029, Two-Year Cadence (Updated)". Tom's Hardware. Retrieved 2021-03-15.
  9. ^ a b Intel’s Path to 10nm: 2010 to 2019 - 25 January 2019
  10. ^ Intel's 10nm Cannon Lake and Core i3-8121U Deep Dive Review - 25 January 2019.
  11. ^ Intel Raptor Lake's rumoured 24 cores could crush multi-threaded applications - 11 June 2021.
  12. ^ Cutress, Ian (26 July 2021). "Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A". www.anandtech.com.
  13. ^ Meteor Lake, Intel's first 7nm CPU, to tape in before July this year and release in 2023 - 23 March 2021.
  14. ^ "Intel Client & Server CPU Roadmap Updates: Meteor Lake In 2023, 20A & 18A Powered Xeons & Core Chips Beyond 2024". Wccftech. 17 February 2022. Retrieved 2022-02-17.{{cite web}}: CS1 maint: url-status (link)


process, architecture, optimization, model, help, expand, this, article, with, text, translated, from, corresponding, article, chinese, click, show, important, translation, instructions, machine, translation, like, deepl, google, translate, useful, starting, p. You can help expand this article with text translated from the corresponding article in Chinese Click show for important translation instructions Machine translation like DeepL or Google Translate is a useful starting point for translations but translators must revise errors as necessary and confirm that the translation is accurate rather than simply copy pasting machine translated text into the English Wikipedia Do not translate text that appears unreliable or low quality If possible verify the text with references provided in the foreign language article You must provide copyright attribution in the edit summary accompanying your translation by providing an interlanguage link to the source of your translation A model attribution edit summary is Content in this edit is translated from the existing Chinese Wikipedia article at zh 制程 架构 优化模型 see its history for attribution You should also add the template Translated zh 制程 架构 优化模型 to the talk page For more guidance see Wikipedia Translation Process architecture optimization is a development model for central processing units CPUs that Intel adopted in 2016 Under this three phase three year model every microprocessor die shrink is followed by a microarchitecture change and then by one or more optimizations It replaced the two phase two year tick tock model that Intel adopted in 2006 The tick tock model was no longer economically sustainable according to Intel because production of ever smaller dies becomes ever more costly 1 2 3 4 5 Contents 1 Roadmap 2 See also 3 Notes 4 ReferencesRoadmap EditWave 6 Process die shrink Architecture Optimizations Optionalbackport 7 8 1 14 nm 2014 Broadwell 5th gen 2015 Skylake 6th gen 2016 Kaby Lake 7th gen 2017 Coffee Lake 8th gen 2018 Coffee Lake Refresh 9th gen 2019 Comet Lake 10th gen 2021 Rocket Lake 11th gen Cypress Cove References 1 3 6 9 2 10 nm Intel 7 2018 note 1 Cannon Lake 8th gen Palm Cove 2019 Ice Lake 10th gen Sunny Cove 2020 Tiger Lake 11th gen Willow Cove 2021 Alder Lake 12th gen Golden Cove 2022 Raptor Lake 13th gen References 1 10 9 11 12 3 Intel 4 2023 Meteor Lake 14th gen References 13 3 Intel 20AandIntel 18A 2024 Arrow Lake 15th gen Lunar Lake 16th gen References 14 See also EditList of Intel CPU microarchitecturesNotes Edit Cannon Lake only 1 CPU released microarchitecture dumped 1 5 year later References Edit a b c Tick Tock On The Rocks Intel Delays 10nm Adds 3rd Gen 14nm Core Product Kaby Lake AnandTech 16 July 2015 Cutress Ian Intel s Tick Tock Seemingly Dead Becomes Process Architecture Optimization a b eTeknix com 23 March 2016 Intel Ditches Tick Tock for Process Architecture Optimization eTeknix Intel Tick Tock Processor Model Replaced With Process Architecture Optimization Legit Reviews 23 March 2016 Intel 7th Gen Core Process Architecture Optimization 30 August 2016 a b Intel Launches 7th Generation Kaby Lake 15W 28W with Iris 35 91W Desktop and Mobile Xeon 03 January 2017 Cutress Dr Ian Intel s Manufacturing Roadmap from 2019 to 2029 Back Porting 7nm 5nm 3nm 2nm and 1 4 nm www anandtech com Retrieved 2021 03 15 December 2019 Arne Verheyde 11 11 December 2019 Intel Process Roadmap Shows 1 4nm in 2029 Two Year Cadence Updated Tom s Hardware Retrieved 2021 03 15 a b Intel s Path to 10nm 2010 to 2019 25 January 2019 Intel s 10nm Cannon Lake and Core i3 8121U Deep Dive Review 25 January 2019 Intel Raptor Lake s rumoured 24 cores could crush multi threaded applications 11 June 2021 Cutress Ian 26 July 2021 Intel s Process Roadmap to 2025 with 4nm 3nm 20A and 18A www anandtech com Meteor Lake Intel s first 7nm CPU to tape in before July this year and release in 2023 23 March 2021 Intel Client amp Server CPU Roadmap Updates Meteor Lake In 2023 20A amp 18A Powered Xeons amp Core Chips Beyond 2024 Wccftech 17 February 2022 Retrieved 2022 02 17 a href Template Cite web html title Template Cite web cite web a CS1 maint url status link This computer hardware article is a stub You can help Wikipedia by expanding it vte Retrieved from https en wikipedia org w index php title Process architecture optimization model amp oldid 1158791112, wikipedia, wiki, book, books, library,

article

, read, download, free, free download, mp3, video, mp4, 3gp, jpg, jpeg, gif, png, picture, music, song, movie, book, game, games.