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Wikipedia

R3000

April 10, 2023

The R3000 is a 32-bit RISC microprocessor chipset developed by MIPS Computer Systems that implemented the MIPS I instruction set architecture (ISA). Introduced in June 1988, it was the second MIPS implementation, succeeding the R2000 as the flagship MIPS microprocessor. It operated at 20, 25 and 33.33 MHz.

The MIPS 1 instruction set is small compared to those of the contemporary 80x86 and 680x0 architectures, encoding only more commonly used operations and supporting few addressing modes. Combined with its fixed instruction length and only three different types of instruction formats, this simplified instruction decoding and processing. It employed a 5-stage instruction pipeline, enabling execution at a rate approaching one instruction per cycle, unusual for its time.

This MIPS generation supports up to four co-processors. In addition to the CPU core, the R3000 microprocessor includes a Control Processor (CP), which contains a Translation Lookaside Buffer and a Memory Management Unit.[1] The CP works as a coprocessor. Besides the CP, the R3000 can also support an external R3010 numeric coprocessor,[2] along with two other external coprocessors.

The R3000 CPU does not include level 1 cache. Instead, its on-chip cache controller operates external data and instruction caches of up to 256 KB each. It can access both caches during the same clock cycle.

The R3000 found much success and was used by many companies in their workstations and servers. Users included:

The R3000 was also used as an embedded microprocessor. When advances in technology rendered it obsolete for high-performance systems, it found continued use in lower-cost designs. Companies such as LSI Logic developed derivatives of the R3000 specifically for embedded systems.

The R3000 was a further development of the R2000 with minor improvements including larger TLB and a faster bus to the external caches. The R3000 die contained 115,000 transistors and measured about 75,000 square mils (48 mm2).[6] MIPS was a fabless semiconductor company, so the R3000 was fabricated by MIPS partners including Integrated Device Technology (IDT), LSI Logic, NEC Corporation, Performance Semiconductor, and others. It was fabricated in a 1.2 μm complementary metal–oxide–semiconductor (CMOS) process[1] with two levels of aluminium interconnect.

MIPS R3000A die shot

Derivatives of the R3000 for non-embedded applications include:

  • R3000A - A further development by MIPS introduced in 1989. It operated at clock frequencies up to 40 MHz.
  • PR3400 - Developed by Performance Semiconductor, introduced in May 1991, also at up to 40 MHz. It integrated the Performance Semiconductor PR3000A and PR3010A onto a single die.

Derivatives of the R3000 for embedded applications include:

  • PR31700 - A 75 MHz microcontroller from Philips Semiconductors. Fabricated in a 350 nm process, delivered in a 208-pin LQFP, it operated at 3.3 V and dissipated only 350 mW.
  • RISController - A family of low-end microcontrollers from IDT. Models include the R3041, R3051, R3052, R3071 and R3081.
  • TX3900 - A microcontroller from Toshiba.
  • Mongoose-V - A radiation-hardened and expanded 10–15 MHz CPU for use on spacecraft, it is still in use today in applications such as NASA's New Horizons space probe.

References

  1. ^ a b Jurij Šilc; Borut Robič; Theo Ungerer (1999). Processor Architecture: From Dataflow to Superscalar and Beyond. Springer-Verlag Berlin Heidelberg. p. 38. ISBN 978-3-540-64798-0.
  2. ^ Rowen, Chris; Johnson, Mark; Ries, Paul (June 1988). "The MIPS R3010 Floating-Point Coprocessor". IEEE Micro. The Institute of Electrical and Electronic Engineers. 8 (3): 53–62. doi:10.1109/40.540. ISSN 0272-1732. S2CID 12859181. Retrieved 24 April 2022.
  3. ^ Sharma, Aashish (21 July 2015). "The Original PlayStation CPU is Powering New Horizons". Fossbytes.
  4. ^ Tomson, Iain (14 January 2015). "PlayStation-processor-powered plutonium probe prepares Pluto pics". The Register.
  5. ^ Dockrill, Peter (17 July 2015). "NASA's New Horizon Probe Made It to Pluto With a PlayStation CPU For a Brain". Science Alert.
  6. ^ Michael Slater, ed. (1992). A Guide to RISC microprocessors. Academic Press, Inc. p. 129. ISBN 978-0-12-649140-1.
  • "MIPS Technologies R3000"

Further reading

  • Rowen, Chris; Johnson, Mark; Ries, Paul (June 1988). "The MIPS R3010 Floating-Point Coprocessor". IEEE Micro. 8 (3): 53–62. doi:10.1109/40.540. S2CID 12859181.

April 10, 2023
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The R3000 is a 32 bit RISC microprocessor chipset developed by MIPS Computer Systems that implemented the MIPS I instruction set architecture ISA Introduced in June 1988 it was the second MIPS implementation succeeding the R2000 as the flagship MIPS microprocessor It operated at 20 25 and 33 33 MHz R3000DesignerMIPS Computer SystemsBits32 bitDesignRISCThe MIPS 1 instruction set is small compared to those of the contemporary 80x86 and 680x0 architectures encoding only more commonly used operations and supporting few addressing modes Combined with its fixed instruction length and only three different types of instruction formats this simplified instruction decoding and processing It employed a 5 stage instruction pipeline enabling execution at a rate approaching one instruction per cycle unusual for its time This MIPS generation supports up to four co processors In addition to the CPU core the R3000 microprocessor includes a Control Processor CP which contains a Translation Lookaside Buffer and a Memory Management Unit 1 The CP works as a coprocessor Besides the CP the R3000 can also support an external R3010 numeric coprocessor 2 along with two other external coprocessors The R3000 CPU does not include level 1 cache Instead its on chip cache controller operates external data and instruction caches of up to 256 KB each It can access both caches during the same clock cycle The R3000 found much success and was used by many companies in their workstations and servers Users included Ardent Computer Atari COJAG A Modifided Atari Jaguar For Arcade Systems Digital Equipment Corporation DEC for their DECstation workstations and multiprocessor DECsystem servers Evans amp Sutherland for their Vision ESV series workstations MIPS Computer Systems for their MIPS RISC os Unix workstations and servers NEC for their RISC EWS4800 workstations and UP4800 servers Prime Computer Pyramid Technology Seiko Epson Silicon Graphics for their Professional IRIS Personal IRIS and Indigo workstations and the multiprocessor Power Series visualization systems Sony for their PlayStation and PlayStation 2 SCPH 10000 to SCPH 700XX clocked at 37 5 MHz for use as an I O CPU and at 33 8 MHz for compatibility with PlayStation games video game consoles and NEWS workstations as well as the Bemani System 573 Analog arcade unit which runs on the R3000A Tandem Computers for their NonStop Cyclone R and CLX R fault tolerant servers Whitechapel Workstations for their Hitech 20 workstation New Horizons Probe 3 4 5 The R3000 was also used as an embedded microprocessor When advances in technology rendered it obsolete for high performance systems it found continued use in lower cost designs Companies such as LSI Logic developed derivatives of the R3000 specifically for embedded systems The R3000 was a further development of the R2000 with minor improvements including larger TLB and a faster bus to the external caches The R3000 die contained 115 000 transistors and measured about 75 000 square mils 48 mm2 6 MIPS was a fabless semiconductor company so the R3000 was fabricated by MIPS partners including Integrated Device Technology IDT LSI Logic NEC Corporation Performance Semiconductor and others It was fabricated in a 1 2 mm complementary metal oxide semiconductor CMOS process 1 with two levels of aluminium interconnect MIPS R3000A die shot Derivatives of the R3000 for non embedded applications include R3000A A further development by MIPS introduced in 1989 It operated at clock frequencies up to 40 MHz PR3400 Developed by Performance Semiconductor introduced in May 1991 also at up to 40 MHz It integrated the Performance Semiconductor PR3000A and PR3010A onto a single die Derivatives of the R3000 for embedded applications include PR31700 A 75 MHz microcontroller from Philips Semiconductors Fabricated in a 350 nm process delivered in a 208 pin LQFP it operated at 3 3 V and dissipated only 350 mW RISController A family of low end microcontrollers from IDT Models include the R3041 R3051 R3052 R3071 and R3081 TX3900 A microcontroller from Toshiba Mongoose V A radiation hardened and expanded 10 15 MHz CPU for use on spacecraft it is still in use today in applications such as NASA s New Horizons space probe References Edit a b Jurij Silc Borut Robic Theo Ungerer 1999 Processor Architecture From Dataflow to Superscalar and Beyond Springer Verlag Berlin Heidelberg p 38 ISBN 978 3 540 64798 0 Rowen Chris Johnson Mark Ries Paul June 1988 The MIPS R3010 Floating Point Coprocessor IEEE Micro The Institute of Electrical and Electronic Engineers 8 3 53 62 doi 10 1109 40 540 ISSN 0272 1732 S2CID 12859181 Retrieved 24 April 2022 Sharma Aashish 21 July 2015 The Original PlayStation CPU is Powering New Horizons Fossbytes Tomson Iain 14 January 2015 PlayStation processor powered plutonium probe prepares Pluto pics The Register Dockrill Peter 17 July 2015 NASA s New Horizon Probe Made It to Pluto With a PlayStation CPU For a Brain Science Alert Michael Slater ed 1992 A Guide to RISC microprocessors Academic Press Inc p 129 ISBN 978 0 12 649140 1 MIPS Technologies R3000 Further reading EditRowen Chris Johnson Mark Ries Paul June 1988 The MIPS R3010 Floating Point Coprocessor IEEE Micro 8 3 53 62 doi 10 1109 40 540 S2CID 12859181 Retrieved from https en wikipedia org w index php title R3000 amp oldid 1133239267, wikipedia, wiki, book, books, library,

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