Programmed input–output (also programmable input/output, programmed input/output, programmed I/O, PIO) is a method of data transmission, via input/output (I/O), between a central processing unit (CPU) and a peripheral device,[1] such as a Parallel ATA storage device. Each data item transfer is initiated by an instruction in the program, involving the CPU for every transaction. In contrast, in direct memory access (DMA) operations, the CPU is uninvolved in the data transfer.
The term can refer to either memory-mapped I/O (MMIO) or port-mapped I/O (PMIO). PMIO refers to transfers using a special address space outside of normal memory, usually accessed with dedicated instructions, such as IN and OUT in x86 architectures. MMIO[2] refers to transfers to I/O devices that are mapped into the normal address space available to the program. PMIO was very useful for early microprocessors with small address spaces, since the valuable resource was not consumed by the I/O devices.
The best known example of a PC device that uses programmed I/O is the Parallel AT Attachment (PATA) interface; however, the AT Attachment interface can also be operated in any of several DMA modes. Many older devices in a PC also use PIO, including legacy serial ports, legacy parallel ports when not in ECP mode, keyboard and mouse PS/2 ports, legacy MIDI and joystick ports, the interval timer, and older network interfaces.
The PIO interface is grouped into different modes that correspond to different transfer rates. The electrical signaling among the different modes is similar — only the cycle time between transactions is reduced in order to achieve a higher transfer rate. All ATA devices support the slowest mode — Mode 0. By accessing the information registers (using Mode 0) on an ATA drive, the CPU is able to determine the maximum transfer rate for the device and configure the ATA controller for optimal performance.
The PIO modes require a great deal of CPU overhead to configure a data transaction and transfer the data. Because of this inefficiency, the DMA (and eventually Ultra Direct Memory Access (UDMA) interface was created to increase performance. The simple digital logic needed to implement a PIO transfer still makes this transfer method useful today, especially if high transfer rates are unneeded as in embedded systems, or with field-programmable gate array (FPGA) chips, where PIO mode can be used with no significant performance loss.
Two additional advanced timing modes have been defined in the CompactFlash specification 2.0. Those are PIO modes 5 and 6. They are specific to CompactFlash.
A PIO Mode 5 was proposed[3] with operation at 22 MB/s, but was never implemented on hard disks because CPUs of the time would have been crippled waiting for the hard disk at the proposed PIO 5 timings, and the DMA standard ultimately obviated it. While no hard disk drive was ever manufactured to support this mode, some motherboard manufacturers preemptively provided BIOS support for it. PIO Mode 5 can be used with CompactFlash cards connected to ATA via CF-to-ATA adapters.
^Hayes, John P. (1978). Computer Architecture and Organization. McGraw-Hill International Book Company. p. 419. ISBN0-07-027363-4.
^Stallings, William (2012). Computer Organization and Architecture (9th ed.). Pearson.
^Chen, Joseph (January 10, 1995). "Proposed 22 MByte/Sec ATA Timing Extension for ATA-3" (PDF). T10.org. Technical Committee T10 (X3T10). (PDF) from the original on June 20, 2010. Retrieved February 19, 2020.
April 12, 2024
programmed, input, output, this, article, needs, additional, citations, verification, please, help, improve, this, article, adding, citations, reliable, sources, unsourced, material, challenged, removed, find, sources, news, newspapers, books, scholar, jstor, . This article needs additional citations for verification Please help improve this article by adding citations to reliable sources Unsourced material may be challenged and removed Find sources Programmed input output news newspapers books scholar JSTOR June 2013 Learn how and when to remove this template message Programmed input output also programmable input output programmed input output programmed I O PIO is a method of data transmission via input output I O between a central processing unit CPU and a peripheral device 1 such as a Parallel ATA storage device Each data item transfer is initiated by an instruction in the program involving the CPU for every transaction In contrast in direct memory access DMA operations the CPU is uninvolved in the data transfer The term can refer to either memory mapped I O MMIO or port mapped I O PMIO PMIO refers to transfers using a special address space outside of normal memory usually accessed with dedicated instructions such as IN and OUT in x86 architectures MMIO 2 refers to transfers to I O devices that are mapped into the normal address space available to the program PMIO was very useful for early microprocessors with small address spaces since the valuable resource was not consumed by the I O devices The best known example of a PC device that uses programmed I O is the Parallel AT Attachment PATA interface however the AT Attachment interface can also be operated in any of several DMA modes Many older devices in a PC also use PIO including legacy serial ports legacy parallel ports when not in ECP mode keyboard and mouse PS 2 ports legacy MIDI and joystick ports the interval timer and older network interfaces Contents 1 PIO mode in the ATA interface 1 1 PIO Mode 5 2 See also 3 ReferencesPIO mode in the ATA interface editThe PIO interface is grouped into different modes that correspond to different transfer rates The electrical signaling among the different modes is similar only the cycle time between transactions is reduced in order to achieve a higher transfer rate All ATA devices support the slowest mode Mode 0 By accessing the information registers using Mode 0 on an ATA drive the CPU is able to determine the maximum transfer rate for the device and configure the ATA controller for optimal performance The PIO modes require a great deal of CPU overhead to configure a data transaction and transfer the data Because of this inefficiency the DMA and eventually Ultra Direct Memory Access UDMA interface was created to increase performance The simple digital logic needed to implement a PIO transfer still makes this transfer method useful today especially if high transfer rates are unneeded as in embedded systems or with field programmable gate array FPGA chips where PIO mode can be used with no significant performance loss Two additional advanced timing modes have been defined in the CompactFlash specification 2 0 Those are PIO modes 5 and 6 They are specific to CompactFlash PIO modes Mode Maximum transfer rate MB s Minimum cycle time Standard where spec is definedMode 0 3 3 600 ns ATA 1Mode 1 5 2 383 ns ATA 1Mode 2 8 3 240 ns ATA 1Mode 3 11 1 180 ns ATA 2Mode 4 16 7 120 ns ATA 2Mode 5 20 100 ns CompactFlash 2 0Mode 6 25 80 ns CompactFlash 2 0PIO Mode 5 edit A PIO Mode 5 was proposed 3 with operation at 22 MB s but was never implemented on hard disks because CPUs of the time would have been crippled waiting for the hard disk at the proposed PIO 5 timings and the DMA standard ultimately obviated it While no hard disk drive was ever manufactured to support this mode some motherboard manufacturers preemptively provided BIOS support for it PIO Mode 5 can be used with CompactFlash cards connected to ATA via CF to ATA adapters See also editWDMA computer single multi word DMA AT Attachment ATA specification Input output Interrupt List of device bandwidths CompactFlashReferences edit Hayes John P 1978 Computer Architecture and Organization McGraw Hill International Book Company p 419 ISBN 0 07 027363 4 Stallings William 2012 Computer Organization and Architecture 9th ed Pearson Chen Joseph January 10 1995 Proposed 22 MByte Sec ATA Timing Extension for ATA 3 PDF T10 org Technical Committee T10 X3T10 Archived PDF from the original on June 20 2010 Retrieved February 19 2020 Retrieved from https en wikipedia org w index php title Programmed input output amp oldid 1201428359, wikipedia, wiki, book, books, library,
