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Goldmont

Goldmont is a microarchitecture for low-power Atom, Celeron and Pentium branded processors used in systems on a chip (SoCs) made by Intel. They allow only one thread per core.

Goldmont
General information
Product code
  • 80668 (Apollo Lake)
  • 80765 (Denverton)
Architecture and classification
Technology node14 nm
Instructionsx86-64, Intel 64
Extensions
Physical specifications
Cores
  • 2–4
Products, models, variants
Brand name(s)
History
PredecessorAirmont (die shrink)
SuccessorGoldmont Plus (optimization)

The Apollo Lake platform with 14 nm Goldmont core was unveiled at the Intel Developer Forum (IDF) in Shenzhen, China, April 2016.[1] The Goldmont architecture borrows heavily from the Skylake Core processors, so it offers a more than 30 percent performance boost compared to the previous Braswell platform, and it can be used to implement power-efficient low-end devices including Cloudbooks, 2-in-1 netbooks, small PCs, IP cameras, and in-car entertainment systems.[2][3]

Design

Goldmont is the 2nd generation out-of-order low-power Atom microarchitecture designed for the entry level desktop and notebook computers.[4] Goldmont is built on the 14 nm manufacturing process and supports up to four cores for the consumer devices. It includes the Intel Gen9 graphics architecture introduced with the Skylake.

The Goldmont microarchitecture builds on the success of the Silvermont microarchitecture, and provides the following enhancements:

  • An out-of-order execution engine with a 3-wide superscalar pipeline.[5] Specifically:
    • The decoder can decode 3 instructions per cycle.
    • The microcode sequencer can send 3 µops per cycle for allocation into the reservation stations.
    • Retirement supports a peak rate of 3 per cycle.
  • Enhancement in branch prediction which de-couples the fetch pipeline from the instruction decoder.
  • Larger out-of-order execution window and buffers that enable deeper out-of-order execution across integer, FP/SIMD, and memory instruction types.
  • Fully out-of-order memory execution and disambiguation. The Goldmont microarchitecture can execute one load and one store per cycle (compared to one load or one store per cycle in the Silvermont microarchitecture). The memory execution pipeline also includes a second level TLB enhancement with 512 entries for 4KB pages.
  • Integer execution cluster in the Goldmont microarchitecture provides three pipelines and can execute up to three simple integer ALU operations per cycle.
  • SIMD integer and floating-point instructions execute in a 128-bit wide engine. Throughput and latency of many instructions have improved, including PSHUFB with 1-cycle throughput (versus 5 cycles for Silvermont microarchitecture) and many other SIMD instructions with doubled throughput.
  • Throughput and latency of instructions for accelerating encryption/decryption (AES) and carry-less multiplication (PCLMULQDQ) have been improved significantly in the Goldmont microarchitecture.
  • The Goldmont microarchitecture provides new instructions with hardware accelerated secure hashing algorithm, SHA1 and SHA256.
  • The Goldmont microarchitecture also adds support for the RDSEED instruction for random number generation meeting the NIST SP800-90C standard.
  • PAUSE instruction latency is optimized to enable better power efficiency.

Technology

Erratum

Similar to previous Silvermont generation design flaws were found in processor circuitry resulting in cease of operation when processors are actively used for several years. Errata named APL46 "System May Experience Inability to Boot or May Cease Operation"[8] was added to documentation in June 2017 stating that low pin count (LPC), real time clock (RTC), SD card and GPIO interfaces may stop functioning.

Mitigations[9] were found to limit impact on systems. Firmware update for the LPC bus called LPC_CLKRUN# reduces the utilization of the LPC interface which in turn decreases (but does not eliminate) LPC bus degradation – some systems are however not compatible with this new firmware. It is recommended not to use SD card as a boot device and to remove the card from the system when not in use, other possible solution being using only UHS-I cards and operating them at 1.8 V.

Congatec also states the issues impact USB buses and eMMC, although those are not mentioned in Intel's public documentation. USB should have a maximum of 12% active time and there is a 60TB transmit traffic life expectancy over the lifetime of the port. eMMC should have a maximum of 33% active time and should be set to D3 device low power state by the operating system when not in use. Newer designs such as Atom C3000 Denverton do not seem to be affected.[10]

List of Goldmont processors

Desktop processors (Apollo Lake)

List of desktop processors as follows:[3][11]

Target
segment
Cores
(threads = cores)
Processor
branding & model
GPU model TDP

(W)

CPU freq.

(GHz)

GPU freq.

(MHz)

L2
cache
Release
date
Price
(USD)
Brand name &
model number
EU Base Turbo Base Turbo
Desktop 4 (4) Pentium J4205 HD Graphics 505 18 10 1.5 2.6 250 800 2 MB Q3 2016 $161
Celeron J3455 HD Graphics 500 12 2.3 750 $107
2 (2) J3355 2.0 2.5 700

Server processors (Denverton)

Target
segment
Cores

(threads)

Processor
branding & model
TDP

(W)

CPU freq.

(GHz)

L2
cache
DDR4 speed Release
date
Price
(USD)
Base Turbo
Server 16 (16) Atom C3958[12][13] 31 2.0 16 MB 2400 Q3 2017 $449
16 (16) C3955[12] 32 2.1 2.4 $434
12 (12) C3858[12] 25 2.0 12 MB $332
12 (12) C3850[12] 2.1 2.4 $323
12 (12) C3830[12] 21 1.9 2.3 2133 $289
12 (12) C3808[12] 25 2.0 $369
8 (8) C3758[12] 2.2 16 MB 2400 $193
8 (8) C3750[12] 21 2.2 2.4 $171
8 (8) C3708[12] 17 1.7 2133 $209
4 (4) C3558[12] 16 2.2 8 MB $86
4 (4) C3538[12] 15 2.1 $75
4 (4) C3508[12] 11.25 1.6 1866 $86
2 (2) C3338[12] 9 1.5 2.2 4 MB Q1 2017 $27
2 (2) C3308[12] 9.5 1.6 2.1 Q3 2017 $32

Mobile processors (Apollo Lake)

List of mobile processors as follows:[3][11]

Target
segment
Cores
(Threads)
Processor
branding & model
GPU model TDP

(W)

CPU freq.

(GHz)

GPU freq.

(MHz)

L2
cache
Release
date
Price
(USD)
Brand name &
model number
EU Base Turbo Base Turbo
Mobile 4 (4) Pentium N4200 HD Graphics 505 18 6 1.1 2.5 200 750 2 MB Q3 2016 $161
Celeron N3450 HD Graphics 500 12 2.2 700 $107
2 (2) N3350 2.4 650

Embedded processors (Apollo Lake)

List of embedded processors as follows:

Target
segment
Cores
(threads)
Processor
branding & model
GPU model TDP

(W)

CPU freq.

(GHz)

GPU freq.

(MHz)

L2
cache
Release
date
Price
(USD)
Brand name &
model number
EU Base Turbo Base Turbo
Embedded 4 (4) Atom x7 E3950 HD Graphics 505 18 12 1.6 2.0 500 650 2 MB Q3 2016 ?
Atom x5 E3940 HD Graphics 500 12 9.5 1.8 400 600
2 (2) E3930 6.5 1.3 550

Automotive processors (Apollo Lake)

There is also an Atom A3900 series exclusively for automotive customers with AEC-Q100 qualification:[14]

Target
segment
Cores
(threads)
Processor
branding & model
GPU model TDP

(W)

CPU freq.

(GHz)

GPU freq.

(MHz)

L2
cache
Release
date
Price
(USD)
Brand name &
model number
EU Base Turbo Normal Turbo
Automotive 4 (4) Atom x7 A3960 HD Graphics 505 18 12.5 1.9 2.4 600 750 2 MB ?
A3950 9.5 1.6 2.0 500 650
Atom x5 A3940 HD Graphics 500 12 8 1.8 400 600
2 (2) A3930 6 1.3 550

Tablet processors (Willow Trail)

Willow Trail platform was canceled. Apollo Lake will be offered instead.[15]

See also

References

  1. ^ Eric Brown (2016-04-18). . Hackerboards.com. Archived from the original on 2016-06-20. Retrieved 2016-06-11.
  2. ^ Anton Shilov (2016-04-15). "Intel Unveils New Low-Cost PC Platform: Apollo Lake with 14nm Goldmont Cores". Anandtech.com. Retrieved 2016-06-11.
  3. ^ a b c Alexander Fagot/ Allen Ngo (2016-06-07). "Intel claims Apollo Lake will be 30 percent faster than Braswell". Notebookcheck.net. Retrieved 2016-06-11.
  4. ^ Anton Shilov (2015-06-10). "Intel preps 'Apollo Lake' CPUs with 'Goldmont' cores, Gen9 graphics". Retrieved 2016-06-11.
  5. ^ Kanter, David. "Goldmont Takes Atom to 14nm". The Linley Group. The Linley Group. Retrieved 17 August 2017.
  6. ^ "Release Notes : DRIVER VERSION: 31.0.101.2115" (PDF). Downloadmirror.intel.com. Retrieved 29 December 2022.
  7. ^ "Mesa 13.0 Released With Intel OpenGL 4.5, RADV Radeon Vulkan Driver - Phoronix". Phoronix.com.
  8. ^ "Intel® Pentium® and Celeron® Processor N- and J- Series Specification Update" (PDF). Retrieved 2018-04-13.
  9. ^ (PDF). congatec. 2017-07-26. Archived from the original (PDF) on 2018-04-15. Retrieved 2018-04-15.
  10. ^ "Intel® Atom® Processor C3000 Product Family Specification Update" (PDF). Retrieved 2018-04-13.
  11. ^ a b Gennadiy Shvets (2016-06-09). "Model numbers of Apollo Lake processors revealed". cpu-world.com. Retrieved 2016-06-11.
  12. ^ a b c d e f g h i j k l m n Kennedy, Patrick (15 August 2017). "Intel Atom C3000 Series Launch SKUs and Differentiation". Serve the Home. Retrieved 15 August 2017.
  13. ^ Cutress, Ian (15 August 2017). "More Denverton Noise: Gigabyte's MA1-ST0 Features Unannounced 16-Core C3958". Anandtech. Retrieved 15 August 2017.
  14. ^ "Intel Atom® Processor E3900 and A3900 Series Datasheet Addendum" (PDF). Intel. Retrieved 12 January 2018.
  15. ^ Ryan Smith & Ian Cutress (2016-04-29). "Intel's Changing Future: Smartphone SoCs Broxton & SoFIA Officially Cancelled". Anandtech.com.

goldmont, microarchitecture, power, atom, celeron, pentium, branded, processors, used, systems, chip, socs, made, intel, they, allow, only, thread, core, general, informationproduct, code80668, apollo, lake, 80765, denverton, architecture, classificationtechno. Goldmont is a microarchitecture for low power Atom Celeron and Pentium branded processors used in systems on a chip SoCs made by Intel They allow only one thread per core GoldmontGeneral informationProduct code80668 Apollo Lake 80765 Denverton Architecture and classificationTechnology node14 nmInstructionsx86 64 Intel 64ExtensionsMMX SSE SSE2 SSE3 SSSE3 SSE4 SSE4 1 SSE4 2AES NI RDRAND CLMUL SHAVT x VT dPhysical specificationsCores2 4Products models variantsBrand name s AtomCeleronPentiumHistoryPredecessorAirmont die shrink SuccessorGoldmont Plus optimization The Apollo Lake platform with 14 nm Goldmont core was unveiled at the Intel Developer Forum IDF in Shenzhen China April 2016 1 The Goldmont architecture borrows heavily from the Skylake Core processors so it offers a more than 30 percent performance boost compared to the previous Braswell platform and it can be used to implement power efficient low end devices including Cloudbooks 2 in 1 netbooks small PCs IP cameras and in car entertainment systems 2 3 Contents 1 Design 2 Technology 3 Erratum 4 List of Goldmont processors 4 1 Desktop processors Apollo Lake 4 2 Server processors Denverton 4 3 Mobile processors Apollo Lake 4 4 Embedded processors Apollo Lake 4 5 Automotive processors Apollo Lake 4 6 Tablet processors Willow Trail 5 See also 6 ReferencesDesign EditGoldmont is the 2nd generation out of order low power Atom microarchitecture designed for the entry level desktop and notebook computers 4 Goldmont is built on the 14 nm manufacturing process and supports up to four cores for the consumer devices It includes the Intel Gen9 graphics architecture introduced with the Skylake The Goldmont microarchitecture builds on the success of the Silvermont microarchitecture and provides the following enhancements An out of order execution engine with a 3 wide superscalar pipeline 5 Specifically The decoder can decode 3 instructions per cycle The microcode sequencer can send 3 µops per cycle for allocation into the reservation stations Retirement supports a peak rate of 3 per cycle Enhancement in branch prediction which de couples the fetch pipeline from the instruction decoder Larger out of order execution window and buffers that enable deeper out of order execution across integer FP SIMD and memory instruction types Fully out of order memory execution and disambiguation The Goldmont microarchitecture can execute one load and one store per cycle compared to one load or one store per cycle in the Silvermont microarchitecture The memory execution pipeline also includes a second level TLB enhancement with 512 entries for 4KB pages Integer execution cluster in the Goldmont microarchitecture provides three pipelines and can execute up to three simple integer ALU operations per cycle SIMD integer and floating point instructions execute in a 128 bit wide engine Throughput and latency of many instructions have improved including PSHUFB with 1 cycle throughput versus 5 cycles for Silvermont microarchitecture and many other SIMD instructions with doubled throughput Throughput and latency of instructions for accelerating encryption decryption AES and carry less multiplication PCLMULQDQ have been improved significantly in the Goldmont microarchitecture The Goldmont microarchitecture provides new instructions with hardware accelerated secure hashing algorithm SHA1 and SHA256 The Goldmont microarchitecture also adds support for the RDSEED instruction for random number generation meeting the NIST SP800 90C standard PAUSE instruction latency is optimized to enable better power efficiency Technology EditSee also Intel HD and Iris Graphics A 14 nm manufacturing process System on chip architecture 3D tri gate transistors Consumer chips up to quad cores Supports SSE4 2 instruction set Supports Intel AESNI and PCLMUL instructions Supports Intel RDRAND and RDSEED instructions Supports Intel SHA extensions Supports Intel MPX Memory Protection Extensions Gen 9 Intel HD Graphics with DirectX 12 OpenGL 4 6 with latest Windows 10 driver update 6 OpenGL 4 5 on Linux 7 OpenGL ES 3 2 and OpenCL 2 0 support HEVC Main10 amp VP9 Profile0 hardware decoding support 10 W thermal design power TDP Desktop or Server processors 4 0 to 6 0 W TDP mobile processors eMMC 5 0 technology to connect to NAND flash storage USB 3 1 amp USB C specification Support for DDR3L LPDDR3 and LPDDR4 memory Integrated Sensor Hub ISH which can sample and combine data from individual sensors and operate independently when the host platform is in a low power state Image Signal Processor ISP supporting four concurrent camera streams Audio controller supporting HD Audio and LPE Audio Trusted Execution Engine 3 0 security subsystemErratum EditSimilar to previous Silvermont generation design flaws were found in processor circuitry resulting in cease of operation when processors are actively used for several years Errata named APL46 System May Experience Inability to Boot or May Cease Operation 8 was added to documentation in June 2017 stating that low pin count LPC real time clock RTC SD card and GPIO interfaces may stop functioning Mitigations 9 were found to limit impact on systems Firmware update for the LPC bus called LPC CLKRUN reduces the utilization of the LPC interface which in turn decreases but does not eliminate LPC bus degradation some systems are however not compatible with this new firmware It is recommended not to use SD card as a boot device and to remove the card from the system when not in use other possible solution being using only UHS I cards and operating them at 1 8 V Congatec also states the issues impact USB buses and eMMC although those are not mentioned in Intel s public documentation USB should have a maximum of 12 active time and there is a 60TB transmit traffic life expectancy over the lifetime of the port eMMC should have a maximum of 33 active time and should be set to D3 device low power state by the operating system when not in use Newer designs such as Atom C3000 Denverton do not seem to be affected 10 List of Goldmont processors EditDesktop processors Apollo Lake Edit List of desktop processors as follows 3 11 Targetsegment Cores threads cores Processorbranding amp model GPU model TDP W CPU freq GHz GPU freq MHz L2cache Releasedate Price USD Brand name amp model number EU Base Turbo Base TurboDesktop 4 4 Pentium J4205 HD Graphics 505 18 10 1 5 2 6 250 800 2 MB Q3 2016 161Celeron J3455 HD Graphics 500 12 2 3 750 1072 2 J3355 2 0 2 5 700Server processors Denverton Edit Targetsegment Cores threads Processorbranding amp model TDP W CPU freq GHz L2cache DDR4 speed Releasedate Price USD Base TurboServer 16 16 Atom C3958 12 13 31 2 0 16 MB 2400 Q3 2017 44916 16 C3955 12 32 2 1 2 4 43412 12 C3858 12 25 2 0 12 MB 33212 12 C3850 12 2 1 2 4 32312 12 C3830 12 21 1 9 2 3 2133 28912 12 C3808 12 25 2 0 3698 8 C3758 12 2 2 16 MB 2400 1938 8 C3750 12 21 2 2 2 4 1718 8 C3708 12 17 1 7 2133 2094 4 C3558 12 16 2 2 8 MB 864 4 C3538 12 15 2 1 754 4 C3508 12 11 25 1 6 1866 862 2 C3338 12 9 1 5 2 2 4 MB Q1 2017 272 2 C3308 12 9 5 1 6 2 1 Q3 2017 32Mobile processors Apollo Lake Edit List of mobile processors as follows 3 11 Targetsegment Cores Threads Processorbranding amp model GPU model TDP W CPU freq GHz GPU freq MHz L2cache Releasedate Price USD Brand name amp model number EU Base Turbo Base TurboMobile 4 4 Pentium N4200 HD Graphics 505 18 6 1 1 2 5 200 750 2 MB Q3 2016 161Celeron N3450 HD Graphics 500 12 2 2 700 1072 2 N3350 2 4 650Embedded processors Apollo Lake Edit List of embedded processors as follows Targetsegment Cores threads Processorbranding amp model GPU model TDP W CPU freq GHz GPU freq MHz L2cache Releasedate Price USD Brand name amp model number EU Base Turbo Base TurboEmbedded 4 4 Atom x7 E3950 HD Graphics 505 18 12 1 6 2 0 500 650 2 MB Q3 2016 Atom x5 E3940 HD Graphics 500 12 9 5 1 8 400 6002 2 E3930 6 5 1 3 550Automotive processors Apollo Lake Edit There is also an Atom A3900 series exclusively for automotive customers with AEC Q100 qualification 14 Targetsegment Cores threads Processorbranding amp model GPU model TDP W CPU freq GHz GPU freq MHz L2cache Releasedate Price USD Brand name amp model number EU Base Turbo Normal TurboAutomotive 4 4 Atom x7 A3960 HD Graphics 505 18 12 5 1 9 2 4 600 750 2 MB A3950 9 5 1 6 2 0 500 650Atom x5 A3940 HD Graphics 500 12 8 1 8 400 6002 2 A3930 6 1 3 550Tablet processors Willow Trail Edit Willow Trail platform was canceled Apollo Lake will be offered instead 15 See also EditList of Intel CPU microarchitectures List of Intel Pentium microprocessors List of Intel Celeron microprocessors List of Intel Atom microprocessors Atom system on chip References Edit Eric Brown 2016 04 18 Apollo Lake Atoms to offer graphics rich Goldmont cores Hackerboards com Archived from the original on 2016 06 20 Retrieved 2016 06 11 Anton Shilov 2016 04 15 Intel Unveils New Low Cost PC Platform Apollo Lake with 14nm Goldmont Cores Anandtech com Retrieved 2016 06 11 a b c Alexander Fagot Allen Ngo 2016 06 07 Intel claims Apollo Lake will be 30 percent faster than Braswell Notebookcheck net Retrieved 2016 06 11 Anton Shilov 2015 06 10 Intel preps Apollo Lake CPUs with Goldmont cores Gen9 graphics Retrieved 2016 06 11 Kanter David Goldmont Takes Atom to 14nm The Linley Group The Linley Group Retrieved 17 August 2017 Release Notes DRIVER VERSION 31 0 101 2115 PDF Downloadmirror intel com Retrieved 29 December 2022 Mesa 13 0 Released With Intel OpenGL 4 5 RADV Radeon Vulkan Driver Phoronix Phoronix com Intel Pentium and Celeron Processor N and J Series Specification Update PDF Retrieved 2018 04 13 Errata sheet congatec Apollo Lake designs PDF congatec 2017 07 26 Archived from the original PDF on 2018 04 15 Retrieved 2018 04 15 Intel Atom Processor C3000 Product Family Specification Update PDF Retrieved 2018 04 13 a b Gennadiy Shvets 2016 06 09 Model numbers of Apollo Lake processors revealed cpu world com Retrieved 2016 06 11 a b c d e f g h i j k l m n Kennedy Patrick 15 August 2017 Intel Atom C3000 Series Launch SKUs and Differentiation Serve the Home Retrieved 15 August 2017 Cutress Ian 15 August 2017 More Denverton Noise Gigabyte s MA1 ST0 Features Unannounced 16 Core C3958 Anandtech Retrieved 15 August 2017 Intel Atom Processor E3900 and A3900 Series Datasheet Addendum PDF Intel Retrieved 12 January 2018 Ryan Smith amp Ian Cutress 2016 04 29 Intel s Changing Future Smartphone SoCs Broxton amp SoFIA Officially Cancelled Anandtech com Retrieved from https en wikipedia org w index php title Goldmont amp oldid 1147180981, wikipedia, wiki, book, books, library,

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