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Sempron

Sempron has been the marketing name used by AMD for several different budget desktop CPUs, using several different technologies and CPU socket formats. The Sempron replaced the AMD Duron processor and competed against Intel's Celeron series of processors. AMD coined the name from the Latin semper, which means "always", to suggest the Sempron is suitable for "daily use, practical, and part of everyday life".[2] The last Semprons were launched in April 2014. The brand was retired with the launch of the AMD A-Series APUs.

Sempron
General information
LaunchedJuly 2004 to April 2014
Common manufacturer(s)
  • AMD
Performance
Max. CPU clock rate1.0 GHz to 2.9 GHz
FSB speeds166 MHz to 2700 MHz
Architecture and classification
Technology node130 nm to 28 nm
Instruction setx86, AMD64
Physical specifications
Cores
  • 1, 2, 4
Socket(s)
Products, models, variants
Core name(s)
  • Thoroughbred-B/Thorton
  • Barton
  • Paris
  • Palermo
  • Manila
  • Sparta
  • Brisbane
  • Sargas
  • Regor
History
Predecessor(s)Duron
Successor(s)AMD APU (Indirect Successor)

History and features edit

The first Sempron CPUs were based on the Athlon XP architecture using the Thoroughbred or Thorton core. These models were equipped with the Socket A interface, 256 KiB L2 cache and 166 MHz Front side bus (FSB 333). Thoroughbred cores natively had 256 KiB L2 cache, but Thortons had 512 KiB L2 cache, half of which was disabled and could sometimes be reactivated with a slight physical modification to the chip. Later, AMD introduced the Sempron 3000+ CPU, based on the Barton core with 512 KiB L2 cache. From a hardware and user standpoint, the Socket A Sempron CPUs were essentially identical to Athlon XP desktop CPUs with a new brand name. AMD has ceased production of all Socket A Sempron CPUs.

The second generation (Paris/Palermo core) was based on the architecture of the Socket 754 Athlon 64. Some differences from Athlon 64 processors include a reduced cache size (either 128 or 256 KiB L2), and the absence of AMD64 support in earlier models. Apart from these differences, the Socket 754 Sempron CPUs share most features with the more powerful Athlon 64, including an integrated (on-die) memory controller, the HyperTransport link, and AMD's "NX bit" feature.

In the second half of 2005, AMD added 64-bit support (AMD64) to the Sempron line. Some journalists (but not AMD) often refer to this revision of chips as "Sempron 64" to distinguish it from the previous revision. AMD's intent in releasing 64-bit entry-level processors was to extend the market for 64-bit processors, which at the time of Sempron 64's first release, was a niche market.

In 2006, AMD announced the Socket AM2 and Socket S1 line of Sempron processors. These are functionally equivalent to the previous generation, except they have a dual-channel DDR2 SDRAM memory controller which replaces the single-channel DDR SDRAM version. The TDP of the standard version remains at 62 W (watts), while the new "Energy Efficient Small Form Factor" version has a reduced 35 W TDP. The Socket AM2 version also does not require a minimum voltage of 1.1 volts to operate, whereas all socket 754 Semprons with Cool'n'Quiet did. In 2006, AMD was selling both Socket 754 and Socket AM2 Sempron CPUs concurrently. In the middle of 2007 AMD appears to have dropped the 754 line and is shipping AM2 and S1 Semprons.

AMD Sempron processor family
Logo Desktop Logo Laptop
Code-named Core Date released Code-named Core Date released
  Thoroughbred
Thorton
Barton
Paris
Palermo
Manila
130 nm
130 nm
130 nm
130 nm
90 nm
90 nm
Jul 2004
Aug 2004
Sep 2004
Jul 2004
Aug 2004
May 2006
  Dublin
Georgetown
Sonora
Albany
Roma
Keene
130 nm
130 nm
90 nm
90 nm
90 nm
90 nm
Jul 2004
May 2005
Nov 2004
Jul 2005
Jul 2005
May 2006
  Sparta
Brisbane
Sargas
65 nm
65 nm
45 nm
Aug 2007
Mar 2008
July 2009
  Sherman
Sable
Huron
65 nm
65 nm
65 nm
May 2007
Jun 2008
Jan 2009
List of AMD Sempron microprocessors

Models for Socket A (Socket 462) edit

 
Fake Sempron 2800+ (Thoroughbred) – Wrong font on label. Note L6 & L8 Bridges cut and some filled – This is a remarked Geode NX.[3]
 
Sempron 3000+ (Barton)
 
Top view of AMD Sempron 3000+ (SDA30000DUT4D)

Thoroughbred B/Thorton (130 nm) edit

  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 256 KiB, full speed
  • MMX, 3DNow!, SSE
  • Socket A (EV6)
  • Front side bus: 166 MHz (FSB 333)
  • VCore: 1.6 V
  • First release: July 28, 2004
  • Clockrate: 1500 MHz – 2000 MHz (2200+ to 2800+)

Barton (130 nm) edit

  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 512 KiB, full speed
  • MMX, 3DNow!, SSE
  • Socket A (EV6)
  • Front side bus: 166 MHz – 200 MHz (FSB 333 – 400)
  • VCore: 1.6 – 1.65 V
  • First release: September 17, 2004
  • Clockrate: 2000–2200 MHz (Sempron 3000+, Sempron 3300+)

Models for Socket 754 edit

Paris (130 nm SOI) edit

  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 256 KiB, full speed
  • MMX, 3DNow!, SSE, SSE2
  • Enhanced Virus Protection (NX bit)
  • Integrated 72-bit (Single channel, ECC capable) DDR memory controller
  • Socket 754, 800 MHz HyperTransport
  • VCore: 1.4 V
  • First release: July 28, 2004
  • Clockrate: 1800 MHz (3100+)
  • Stepping: CG (Part No.: *AX)

Palermo (90 nm SOI) edit

  • Early models (stepping D0) are downlabeled "Oakville" mobile Athlon64
  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 128/256 KiB, full speed
  • MMX, 3DNow!, SSE, SSE2
  • SSE3 support on E3 and E6 steppings
  • AMD64 on E6 stepping
  • Cool'n'Quiet (Sempron 3000+ and higher)
  • Enhanced Virus Protection (NX bit)
  • Integrated 72-bit (Single channel, ECC capable) DDR memory controller
  • Socket 754, 800 MHz HyperTransport
  • VCore: 1.4 V
  • First release: February 2005
  • Clockrate: 1400–2000 MHz
    • 128 KiB L2-Cache (Sempron 2600+, 3000+, 3300+)
    • 256 KiB L2-Cache (Sempron 2500+, 2800+, 3100+, 3400+)
  • Steppings: D0 (Part No.: *BA), E3 (Part No.: *BO), E6 (Part No.: *BX)

Models for Socket 939 edit

Palermo (90 nm SOI) edit

  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 128/256 KiB, full speed
  • MMX, 3DNow!, SSE, SSE2, SSE3, AMD64 (E6 Steppings Only), Cool'n'Quiet, NX bit
  • Integrated 144-bit (Dual channel, ECC capable) DDR memory controller
  • Socket 939, 800 MHz HyperTransport
  • VCore: 1.35/1.4 V
  • First release: October 2005
  • Clockrate: 1800–2000 MHz
    • 128 KiB L2-Cache (Sempron 3000+, 3400+)
    • 256 KiB L2-Cache (Sempron 3200+, 3500+)
  • Steppings: E3 (Part No.: *BP), E6 (Part No.: *BW)

Models for Socket AM2 edit

Manila (90 nm SOI) edit

 
AMD Sempron 3400+
  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 128/256 KiB, full speed
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit
  • Integrated 128-bit (Dual channel) DDR2 memory controller
  • Socket AM2, 800 MHz HyperTransport
  • VCore: 1.25/1.35/1.40 V (1.20/1.25 V for Energy Efficient SFF version)
  • First release: May 23, 2006
  • Clockrate: 1600–2200 MHz
    • 128 KiB L2-Cache (Sempron 2800+, 3200+, 3500+)
    • 256 KiB L2-Cache (Sempron 3000+, 3400+, 3600+, 3800+)
  • Stepping: F2 (Part No.: *CN, *CW)

Sparta (65 nm SOI) edit

  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 256/512 KiB, full speed
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit
  • Integrated 128-bit (Dual channel) DDR2 memory controller
  • Socket AM2, 800 MHz HyperTransport
  • VCore: 1.20/1.40 V
  • First release: August 20, 2007
  • Clockrate: 1900–2300 MHz
    • 256 KiB L2-Cache (Sempron LE-1100, LE-1150)
    • 512 KiB L2-Cache (Sempron LE-1200, LE-1250, LE-1300)
  • Stepping: G1 (Part No.: *DE), G2 (Part No.: *DP)

Brisbane (65 nm SOI) edit

Models for Socket AM3 edit

Sargas (45 nm SOI) edit

  • Chip harvests from Regor with one core disabled[4]
  • Core Speed (MHz) – 2600–2900
  • Max Temps (C): 63
  • VCore: 1.35 V
  • TDP: 45 W
  • L1 Cache Size (KB) 128
  • L2 Cache Size (KB) 1024
  • CPU Arch : 1 CPU – 1 Cores – 1 Threads
  • CPU EXT : MMX(+) 3DNow!(+) SSE SSE2 SSE3 SSE4A x86-64 AMD-V, Cool'n'Quiet, NX bit
  • Integrated 128-bit (Dual Channel) DDR2 + DDR3 Memory Controller
  • Socket AM3, 2000 MHz HyperTransport
  • Steppings: C2, C3

Models for Socket S1 (638) edit

Keene (90 nm SOI) edit

  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 256 or 512 KiB, full speed
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit
  • Integrated 128-bit (Dual channel) DDR2 memory controller
  • Socket S1, 800 MHz HyperTransport
  • VCore: 0.950-1.25 V
  • First release: May 17, 2006
  • Clockrate: 1000–2000 MHz
    • 256 KiB L2-Cache (Sempron 2100+, 3400+)
    • 512 KiB L2-Cache (Sempron 3200+, 3500+, 3600+)
  • Stepping: F2 (Part No.: *CM)

Sable (65 nm SOI) edit

Models for ASB1 package (BGA) edit

Huron (65 nm SOI) edit

  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 256 KiB, full speed
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit
  • Integrated 128-bit (Dual channel) DDR2 memory controller
  • ASB1 package, 800 MHz HyperTransport
  • VCore: ?
  • First release: January 8, 2009
  • Clockrate: 1000–1500 MHz
    • 256 KiB L2-Cache (Sempron 200U) 1000 MHz TDP 8 W
    • 256 KiB L2-Cache (Sempron 210U) 1500 MHz TDP 15 W
  • Stepping: ? (Part No.: *DV)

Models for Socket 754 32-bit Semprons edit

Max P-State Model Manufacturing Process Part Number(OPN)
1600 MHz 2600+ 0.09 micrometre SDA2600AIO2BA(some parts are 64-bit)
1600 MHz 2800+ 0.09 micrometre SDA2800AIO3BA
1800 MHz 3000+ 0.13 micrometre SDA3000AIP2AX
1800 MHz 3100+ 0.13 micrometre SDA3100AIP3AX
1800 MHz 3100+ 0.09 micrometre SDA3100AIO3BA
2000 MHz 3300+ 0.09 micrometre SDA3300AIO2BA
2000 MHz 3400+ 0.09 Micrometre SDA3400AIO3BX

Models for Socket S1 (638) 64-bit Semprons edit

Max P-State Model Manufacturing Process Part Number(OPN)
1000 MHz 800 0.09 micrometre TBA
1600 MHz 3200 0.09 micrometre SMS3200HAX4CM
1800 MHz 3400 0.09 micrometre SMS3400HAX3CM
1800 MHz 3500 0.09 micrometre SMS3500HAX4CM
2000 MHz 3600 0.09 micrometre SMS3600HAX3CM

FM2/FM2+ Semprons edit

  • Model 240, 3.3 GHz/2.9 GHz, 1MB cache, 65W[5]
  • Model 250, 3.6 GHz/3.2 GHz, 1MB cache, 65W, Piledriver microarchitecture, Richland core

Models for Socket AM1 edit

Model Number Cores Frequency L2-Cache HyperTransport Mult 2 Voltage TDP Release Date Part Number(s)
Sempron 2650 2 1.45 GHz 1 MB 14.5x Un­known 25 W April 9, 2014 SD2650JAH23HM
Sempron 3850 4 1.30 GHz 2 MB 13x Un­known 25 W April 9, 2014 SD3850JAH44HM

Semprons without Cool'n'Quiet edit

AMD has released some Sempron processors without Cool'n'Quiet support. The following table describes those processors lacking Cool'n'Quiet.

Max P-State Min P-State Model Operating Mode Package-Socket Manufacturing Process Part Number(OPN)
1400 MHz N/A 2500+ 32/64 Socket 754 0.09 micrometre SDA2500AIO3BX
1600 MHz N/A 2600+ 32 or 32/64 Socket 754 0.09 micrometre SDA2600AIO2BA
1600 MHz N/A 2600+ 32/64 Socket 754 0.09 micrometre SDA2600AIO2BX
1600 MHz N/A 2800+ 32 Socket 754 0.09 micrometre SDA2800AIO3BA
1600 MHz N/A 2800+ 32/64 Socket 754 0.09 micrometre SDA2800AIO3BX
1600 MHz N/A 2800+ 32/64 Socket AM2 0.09 micrometre SDA2800IAA2CN
1600 MHz N/A 3000+ 32/64 Socket AM2 0.09 micrometre SDA3000IAA3CN
1600 MHz N/A 3000+ 32/64 Socket AM2 0.09 micrometre SDA3000IAA4CN

See also edit

References edit

  1. ^ "AMD Sempron APUs". AMD. Retrieved 2014-12-08.
  2. ^ . Archived from the original on August 24, 2006.
  3. ^ "Attention! Remarked Sempron 2800+ [March 02, 2006] - Fab51".
  4. ^ "List of Unlockable AMD CPUs".
  5. ^ "AMD: Sempron CPUs, FM2/FM2+ Model Number Comparison". Retrieved 8 September 2015.

External links edit

  • AMD's Desktop Sempron product page
  • AMD's Notebook Sempron product page

sempron, been, marketing, name, used, several, different, budget, desktop, cpus, using, several, different, technologies, socket, formats, replaced, duron, processor, competed, against, intel, celeron, series, processors, coined, name, from, latin, semper, whi. Sempron has been the marketing name used by AMD for several different budget desktop CPUs using several different technologies and CPU socket formats The Sempron replaced the AMD Duron processor and competed against Intel s Celeron series of processors AMD coined the name from the Latin semper which means always to suggest the Sempron is suitable for daily use practical and part of everyday life 2 The last Semprons were launched in April 2014 The brand was retired with the launch of the AMD A Series APUs SempronGeneral informationLaunchedJuly 2004 to April 2014Common manufacturer s AMDPerformanceMax CPU clock rate1 0 GHz to 2 9 GHzFSB speeds166 MHz to 2700 MHzArchitecture and classificationTechnology node130 nm to 28 nmInstruction setx86 AMD64Physical specificationsCores1 2 4Socket s Socket ASocket 754Socket 939AM2Socket S1AM3FM1FM2AM1 1 Products models variantsCore name s Thoroughbred B ThortonBartonParisPalermoManilaSpartaBrisbaneSargasRegorHistoryPredecessor s DuronSuccessor s AMD APU Indirect Successor Contents 1 History and features 2 Models for Socket A Socket 462 2 1 Thoroughbred B Thorton 130 nm 2 2 Barton 130 nm 3 Models for Socket 754 3 1 Paris 130 nm SOI 3 2 Palermo 90 nm SOI 4 Models for Socket 939 4 1 Palermo 90 nm SOI 5 Models for Socket AM2 5 1 Manila 90 nm SOI 5 2 Sparta 65 nm SOI 5 3 Brisbane 65 nm SOI 6 Models for Socket AM3 6 1 Sargas 45 nm SOI 7 Models for Socket S1 638 7 1 Keene 90 nm SOI 7 2 Sable 65 nm SOI 8 Models for ASB1 package BGA 8 1 Huron 65 nm SOI 9 Models for Socket 754 32 bit Semprons 10 Models for Socket S1 638 64 bit Semprons 11 FM2 FM2 Semprons 12 Models for Socket AM1 13 Semprons without Cool n Quiet 14 See also 15 References 16 External linksHistory and features editThe first Sempron CPUs were based on the Athlon XP architecture using the Thoroughbred or Thorton core These models were equipped with the Socket A interface 256 KiB L2 cache and 166 MHz Front side bus FSB 333 Thoroughbred cores natively had 256 KiB L2 cache but Thortons had 512 KiB L2 cache half of which was disabled and could sometimes be reactivated with a slight physical modification to the chip Later AMD introduced the Sempron 3000 CPU based on the Barton core with 512 KiB L2 cache From a hardware and user standpoint the Socket A Sempron CPUs were essentially identical to Athlon XP desktop CPUs with a new brand name AMD has ceased production of all Socket A Sempron CPUs The second generation Paris Palermo core was based on the architecture of the Socket 754 Athlon 64 Some differences from Athlon 64 processors include a reduced cache size either 128 or 256 KiB L2 and the absence of AMD64 support in earlier models Apart from these differences the Socket 754 Sempron CPUs share most features with the more powerful Athlon 64 including an integrated on die memory controller the HyperTransport link and AMD s NX bit feature In the second half of 2005 AMD added 64 bit support AMD64 to the Sempron line Some journalists but not AMD often refer to this revision of chips as Sempron 64 to distinguish it from the previous revision AMD s intent in releasing 64 bit entry level processors was to extend the market for 64 bit processors which at the time of Sempron 64 s first release was a niche market In 2006 AMD announced the Socket AM2 and Socket S1 line of Sempron processors These are functionally equivalent to the previous generation except they have a dual channel DDR2 SDRAM memory controller which replaces the single channel DDR SDRAM version The TDP of the standard version remains at 62 W watts while the new Energy Efficient Small Form Factor version has a reduced 35 W TDP The Socket AM2 version also does not require a minimum voltage of 1 1 volts to operate whereas all socket 754 Semprons with Cool n Quiet did In 2006 AMD was selling both Socket 754 and Socket AM2 Sempron CPUs concurrently In the middle of 2007 AMD appears to have dropped the 754 line and is shipping AM2 and S1 Semprons AMD Sempron processor familyLogo Desktop Logo LaptopCode named Core Date released Code named Core Date released nbsp ThoroughbredThortonBartonParisPalermoManila 130 nm130 nm130 nm130 nm90 nm90 nm Jul 2004Aug 2004Sep 2004Jul 2004Aug 2004May 2006 nbsp DublinGeorgetownSonoraAlbanyRomaKeene 130 nm130 nm90 nm90 nm90 nm90 nm Jul 2004May 2005Nov 2004Jul 2005Jul 2005May 2006 nbsp SpartaBrisbaneSargas 65 nm65 nm45 nm Aug 2007Mar 2008July 2009 nbsp ShermanSableHuron 65 nm65 nm65 nm May 2007Jun 2008Jan 2009List of AMD Sempron microprocessorsModels for Socket A Socket 462 edit nbsp Fake Sempron 2800 Thoroughbred Wrong font on label Note L6 amp L8 Bridges cut and some filled This is a remarked Geode NX 3 nbsp Sempron 3000 Barton nbsp Top view of AMD Sempron 3000 SDA30000DUT4D Thoroughbred B Thorton 130 nm edit L1 Cache 64 64 KiB Data Instructions L2 Cache 256 KiB full speed MMX 3DNow SSE Socket A EV6 Front side bus 166 MHz FSB 333 VCore 1 6 V First release July 28 2004 Clockrate 1500 MHz 2000 MHz 2200 to 2800 Barton 130 nm edit L1 Cache 64 64 KiB Data Instructions L2 Cache 512 KiB full speed MMX 3DNow SSE Socket A EV6 Front side bus 166 MHz 200 MHz FSB 333 400 VCore 1 6 1 65 V First release September 17 2004 Clockrate 2000 2200 MHz Sempron 3000 Sempron 3300 Models for Socket 754 editParis 130 nm SOI edit L1 Cache 64 64 KiB Data Instructions L2 Cache 256 KiB full speed MMX 3DNow SSE SSE2 Enhanced Virus Protection NX bit Integrated 72 bit Single channel ECC capable DDR memory controller Socket 754 800 MHz HyperTransport VCore 1 4 V First release July 28 2004 Clockrate 1800 MHz 3100 Stepping CG Part No AX Palermo 90 nm SOI edit Early models stepping D0 are downlabeled Oakville mobile Athlon64 L1 Cache 64 64 KiB Data Instructions L2 Cache 128 256 KiB full speed MMX 3DNow SSE SSE2 SSE3 support on E3 and E6 steppings AMD64 on E6 stepping Cool n Quiet Sempron 3000 and higher Enhanced Virus Protection NX bit Integrated 72 bit Single channel ECC capable DDR memory controller Socket 754 800 MHz HyperTransport VCore 1 4 V First release February 2005 Clockrate 1400 2000 MHz 128 KiB L2 Cache Sempron 2600 3000 3300 256 KiB L2 Cache Sempron 2500 2800 3100 3400 Steppings D0 Part No BA E3 Part No BO E6 Part No BX Models for Socket 939 editPalermo 90 nm SOI edit L1 Cache 64 64 KiB Data Instructions L2 Cache 128 256 KiB full speed MMX 3DNow SSE SSE2 SSE3 AMD64 E6 Steppings Only Cool n Quiet NX bit Integrated 144 bit Dual channel ECC capable DDR memory controller Socket 939 800 MHz HyperTransport VCore 1 35 1 4 V First release October 2005 Clockrate 1800 2000 MHz 128 KiB L2 Cache Sempron 3000 3400 256 KiB L2 Cache Sempron 3200 3500 Steppings E3 Part No BP E6 Part No BW Models for Socket AM2 editManila 90 nm SOI edit nbsp AMD Sempron 3400 L1 Cache 64 64 KiB Data Instructions L2 Cache 128 256 KiB full speed MMX Extended 3DNow SSE SSE2 SSE3 AMD64 Cool n Quiet NX bit Integrated 128 bit Dual channel DDR2 memory controller Socket AM2 800 MHz HyperTransport VCore 1 25 1 35 1 40 V 1 20 1 25 V for Energy Efficient SFF version First release May 23 2006 Clockrate 1600 2200 MHz 128 KiB L2 Cache Sempron 2800 3200 3500 256 KiB L2 Cache Sempron 3000 3400 3600 3800 Stepping F2 Part No CN CW Sparta 65 nm SOI edit L1 Cache 64 64 KiB Data Instructions L2 Cache 256 512 KiB full speed MMX Extended 3DNow SSE SSE2 SSE3 AMD64 Cool n Quiet NX bit Integrated 128 bit Dual channel DDR2 memory controller Socket AM2 800 MHz HyperTransport VCore 1 20 1 40 V First release August 20 2007 Clockrate 1900 2300 MHz 256 KiB L2 Cache Sempron LE 1100 LE 1150 512 KiB L2 Cache Sempron LE 1200 LE 1250 LE 1300 Stepping G1 Part No DE G2 Part No DP Brisbane 65 nm SOI editModels for Socket AM3 editSargas 45 nm SOI edit Chip harvests from Regor with one core disabled 4 Core Speed MHz 2600 2900 Max Temps C 63 VCore 1 35 V TDP 45 W L1 Cache Size KB 128 L2 Cache Size KB 1024 CPU Arch 1 CPU 1 Cores 1 Threads CPU EXT MMX 3DNow SSE SSE2 SSE3 SSE4A x86 64 AMD V Cool n Quiet NX bit Integrated 128 bit Dual Channel DDR2 DDR3 Memory Controller Socket AM3 2000 MHz HyperTransport Steppings C2 C3Models for Socket S1 638 editKeene 90 nm SOI edit L1 Cache 64 64 KiB Data Instructions L2 Cache 256 or 512 KiB full speed MMX Extended 3DNow SSE SSE2 SSE3 AMD64 Cool n Quiet NX bit Integrated 128 bit Dual channel DDR2 memory controller Socket S1 800 MHz HyperTransport VCore 0 950 1 25 V First release May 17 2006 Clockrate 1000 2000 MHz 256 KiB L2 Cache Sempron 2100 3400 512 KiB L2 Cache Sempron 3200 3500 3600 Stepping F2 Part No CM Sable 65 nm SOI edit L1 Cache 64 64 KiB Data Instructions L2 Cache 512 KiB full speed MMX Extended 3DNow SSE SSE2 SSE3 AMD64 Cool n Quiet NX bit Integrated 128 bit Dual channel DDR2 memory controller Socket S1 1600 MHz HyperTransport VCore 0 950 1 25 V First release January 8 2009 Clockrate 2000 2100 MHz 25w 512 KiB L2 CacheModels for ASB1 package BGA editHuron 65 nm SOI edit L1 Cache 64 64 KiB Data Instructions L2 Cache 256 KiB full speed MMX Extended 3DNow SSE SSE2 SSE3 AMD64 Cool n Quiet NX bit Integrated 128 bit Dual channel DDR2 memory controller ASB1 package 800 MHz HyperTransport VCore First release January 8 2009 Clockrate 1000 1500 MHz 256 KiB L2 Cache Sempron 200U 1000 MHz TDP 8 W 256 KiB L2 Cache Sempron 210U 1500 MHz TDP 15 W Stepping Part No DV Models for Socket 754 32 bit Semprons editMax P State Model Manufacturing Process Part Number OPN 1600 MHz 2600 0 09 micrometre SDA2600AIO2BA some parts are 64 bit 1600 MHz 2800 0 09 micrometre SDA2800AIO3BA1800 MHz 3000 0 13 micrometre SDA3000AIP2AX1800 MHz 3100 0 13 micrometre SDA3100AIP3AX1800 MHz 3100 0 09 micrometre SDA3100AIO3BA2000 MHz 3300 0 09 micrometre SDA3300AIO2BA2000 MHz 3400 0 09 Micrometre SDA3400AIO3BXModels for Socket S1 638 64 bit Semprons editMax P State Model Manufacturing Process Part Number OPN 1000 MHz 800 0 09 micrometre TBA1600 MHz 3200 0 09 micrometre SMS3200HAX4CM1800 MHz 3400 0 09 micrometre SMS3400HAX3CM1800 MHz 3500 0 09 micrometre SMS3500HAX4CM2000 MHz 3600 0 09 micrometre SMS3600HAX3CMFM2 FM2 Semprons editModel 240 3 3 GHz 2 9 GHz 1MB cache 65W 5 Model 250 3 6 GHz 3 2 GHz 1MB cache 65W Piledriver microarchitecture Richland coreModels for Socket AM1 editThis section needs expansion You can help by adding to it February 2021 Model Number Cores Frequency L2 Cache HyperTransport Mult 2 Voltage TDP Release Date Part Number s Sempron 2650 2 1 45 GHz 1 MB 14 5x Un known 25 W April 9 2014 SD2650JAH23HMSempron 3850 4 1 30 GHz 2 MB 13x Un known 25 W April 9 2014 SD3850JAH44HMSemprons without Cool n Quiet editAMD has released some Sempron processors without Cool n Quiet support The following table describes those processors lacking Cool n Quiet Max P State Min P State Model Operating Mode Package Socket Manufacturing Process Part Number OPN 1400 MHz N A 2500 32 64 Socket 754 0 09 micrometre SDA2500AIO3BX1600 MHz N A 2600 32 or 32 64 Socket 754 0 09 micrometre SDA2600AIO2BA1600 MHz N A 2600 32 64 Socket 754 0 09 micrometre SDA2600AIO2BX1600 MHz N A 2800 32 Socket 754 0 09 micrometre SDA2800AIO3BA1600 MHz N A 2800 32 64 Socket 754 0 09 micrometre SDA2800AIO3BX1600 MHz N A 2800 32 64 Socket AM2 0 09 micrometre SDA2800IAA2CN1600 MHz N A 3000 32 64 Socket AM2 0 09 micrometre SDA3000IAA3CN1600 MHz N A 3000 32 64 Socket AM2 0 09 micrometre SDA3000IAA4CNSee also editList of AMD Sempron microprocessorsReferences edit AMD Sempron APUs AMD Retrieved 2014 12 08 AMD Sempron FAQs Archived from the original on August 24 2006 Attention Remarked Sempron 2800 March 02 2006 Fab51 List of Unlockable AMD CPUs AMD Sempron CPUs FM2 FM2 Model Number Comparison Retrieved 8 September 2015 External links editAMD K7 Sempron technical specifications AMD K8 Sempron technical specifications AMD s Desktop Sempron product page AMD s Notebook Sempron product page Retrieved from https en wikipedia org w index php title Sempron amp oldid 1210122402, wikipedia, wiki, book, books, library,

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