QFET

A quantum field-effect transistor (QFET) or quantum-well field-effect transistor (QWFET) is a type of MOSFET (metal–oxide–semiconductor field-effect transistor)^[1][2][3] that takes advantage of quantum tunneling to greatly increase the speed of transistor operation by eliminating the traditional transistor's area of electron conduction which typically causes carriers to slow down by a factor of 3000. The result is an increase in logic speed by a factor of 10 with a simultaneous reduction in component power requirement and size also by a factor of 10. It achieves these things through a manufacturing process known as rapid thermal processing (RTP) that uses ultrafine layers of construction materials.^[4]

Fairchild FQD19N10 - N-Channel QFET MOSFET 100 V, 15.6 A, 100 mΩ

The letters "QFET" also currently exist as a trademarked name of a series of MOSFETs produced by Fairchild Semiconductor (compiled in November 2015) which contain a proprietary double-diffused metal–oxide–semiconductor (DMOS) technology but which are not, in fact, quantum-based (the Q in this case standing for "quality").

Structure and device operation

Modern examples of quantum field-effect transistors integrate structures traditional to conventual MOSFETs and utilize many of the same materials.^[5] MOSFET transistors consist of dielectric materials, such as SiO₂, and metal gates.^[6] The metal gates are insulated from the gate dielectric layer, which leads to a very high input resistance.^[7] Consisting of three terminals, the source (or input), drain (or output), and gate, MOSFETs can control current flow via an applied voltage (or lack thereof) to the gate terminal, which alters the potential barrier between the layers and enables (or disables) charge flow.^[8]

Source and drain terminals are connected to doped regions of the MOSFET, insulated by the body region. These are either p or n type regions, with both terminals being of the same type and opposite to that of the body type. If the MOSFET is a n-channel MOSFET, both source and drain regions are n+ and the body is a p region. If the MOSFET is a p-channel MOSFET, both source and drain regions are p+ and the body is a n region. In a n-channel MOSFET electrons carry the charge through the source region, and holes carry the charges in the p-channel MOSFET source.

FET structures are typically constructed gradually, layer by layer, using a variety of techniques such as molecular-beam epitaxy, liquid-phase epitaxy, and vapor-phase epitaxy, an example being chemical vapor deposition.^[9] Typical MOSFETs are constructed on the micron scale. Wet chemical etching can be used to create layers of thickness 3 μm or larger, while dry etching techniques can be used to achieve layers on the nanometer scale.^[10] When layer thickness approaches 50 nanometers or less, the de Broglie wavelength of the layer approaches that of a thermalized electron, and conventional energy-momentum relations for bulk semiconductors are no longer operational.^[9]

Ultrathin semiconductor layers are used in the production of QFETs, whose bandgaps are smaller than those of the surrounding materials. In the case of a one-dimensional quantum well QFET, a nanoscale semiconductor layer is grown between two insulating layers. The semiconductor layer has a thickness d, and the electron charge carriers are trapped in a potential well. These electrons, and their corresponding holes, have discrete energy levels that are found by solving the time-independent Schrödinger equation, as shown:

${\displaystyle E_{q}={\hbar ^{2}(q\pi /d)^{2} \over 2m},q=1,2,3,...}$ 

The charge carriers can be activated (or deactivated) by applying a potential to the gate terminal that matches a corresponding energy level. These energy levels depend on the thickness of the semiconductor layer and the material properties. A promising semiconductor candidate for QFET implementation, InGaAs, has a de Broglie wavelength of around 50 nanometers. Larger gaps between energy levels can be achieved by lowering the thickness d of the layer. In the case of InGaAs, layer lengths of around 20 nanometers have been achieved.^[11] In practice, three-dimensional quantum wells are produced, with the dimensions of the plane of the layer, d₂ and d₃, being much larger in relative size. The corresponding electron energy-momentum relation is described by

${\displaystyle E=E_{c}+{\hbar ^{2}k_{1}^{2} \over 2m_{c}}+{\hbar ^{2}k_{2}^{2} \over 2m_{c}}+{\hbar ^{2}k_{3}^{2} \over 2m_{c}}}$ .

The k values in this relation correspond to ${\displaystyle {q_{1}\pi \over d_{1}},{q_{2}\pi \over d_{2}},}$  and ${\displaystyle {q_{3}\pi \over d_{3}}}$ , which are the magnitudes of the wavevectors in each dimension.

QFETs orchestrated with quantum wires similarly confine electron charge carriers in a potential well, yet the nature of their narrow geometric shape enables a manufacturer to trap the electrons in two dimensions.^[12] Quantum wires are essentially channels in a 1D system, providing a tighter carrier confinement and a predictable current flow.^[9][13]

Traditional MOSFETs, constructed with a silicon dioxide layer on top of a silicon substrate, operate by creating a biased p-n junction, which can be forward or reverse biased in the presence of a positive or negative applied voltage, respectively.^[9] In effect, applying a voltage reduces the height of the potential barrier between the p and n regions and allows for charge to flow in the form of positively charged "holes" and negatively charged electrons.

Single-junction QFET's use quantum tunneling to increase speed by eliminating the electronic conduction area, which slows down carriers by up to 3000 times.

Theory and application to optical instruments

The behavior of the building blocks of QFETs can be described by the laws of Quantum Mechanics. In quantum-confined semiconductor structures, the presence of charge carriers (holes and electrons) is quantified by the density of states.^[9] For the case of the three-dimensional quantum well, often constructed as a plane layer of thickness between 2 nm and 20 nm, the density of states ${\displaystyle \rho _{c}(E)}$  is obtained from a two-dimensional vector ${\displaystyle (k_{2}={q_{2}\pi \over d_{2}},k_{3}={q_{3}\pi \over d_{3}})}$ , which corresponds to the area in the plane of the layer. From the ${\displaystyle E-k}$  relation,

${\displaystyle E=E_{c}+{\hbar ^{2}k_{1}^{2} \over 2m_{c}}+{\hbar ^{2}k_{2}^{2} \over 2m_{c}}+{\hbar ^{2}k_{3}^{2} \over 2m_{c}}}$ , it is possible to show that ${\displaystyle {dE \over dk}=\hbar ^{2}k/m_{c}}$ , and thus

${\displaystyle \rho _{c}(E)={\begin{cases}{m_{c} \over \pi \hbar ^{2}d_{1}},\\0,\end{cases}}q_{1}=1,2,3,....}$ ^[9]

Similarly, the energy of one-dimensional nanowires is described by wavevectors, however due to their geometry only one k vector, ${\displaystyle k_{z}}$ , is needed to model the kinetic energy of free motion along the axis of the wire:

${\displaystyle E(k_{z})={\hbar ^{2}k_{z}^{2} \over 2m_{c}}}$ ^[13]

A more accurate energy model may be used to quantify the energy of electrons confined in two dimensions. One can assume the wire to have a rectangular cross section of d₁d₂, leading to a new energy-momentum relation:

${\displaystyle E=E_{c}+{\hbar ^{2}(q_{1}\pi /d_{1})^{2} \over 2m_{c}}+{\hbar ^{2}(q_{2}\pi /d_{2})^{2} \over 2m_{c}}+{\hbar ^{2}k^{2} \over 2m_{c}}}$ , where k is the vector component along the axis of the wire.

Two-dimensional quantum wires can also be cylindrical in shape, with common diameters falling around 20 nm.^[14]

In the case of quantum dots, which are confined to a single dimension, the energy is quantized even further:

${\displaystyle E=E_{c}+{\hbar ^{2}(q_{1}\pi /d_{1})^{2} \over 2m_{c}}+{\hbar ^{2}(q_{2}\pi /d_{2})^{2} \over 2m_{c}}+{\hbar ^{2}(q_{3}\pi /d_{3})^{2} \over 2m_{c}}}$ .

The geometric properties of quantum dots vary, yet typical quantum dot particles have dimensions anywhere between 1 nm and 50 nm. As electron motion is further restricted with each successive dimensional quantization, the subbands of the conduction and valence bands become narrower.

 

III-V tri-gate quantum well MOSFET (Datta, K. & Khosru, Q.)

All semiconductors have a unique conduction and valence band structure. In direct band gap semiconductors, the conduction band minimum and valence band maximum energies occur at the same wavenumber k, corresponding to the same momentum.^[15][9] QFETs with quantum-well structures have conduction bands that are split into numerous subbands, which correspond to their appropriate quantum numbers q = 1, 2, 3,... and offer a higher density of states at their lowest allowed conduction-band and highest allowed valence-band energy levels than MOSFETs, which leads to interesting properties, particularly in their optical characteristics and applications. For quantum-well devices used in laser diodes, photons interact with electrons and holes via transitions between the valence and conduction bands. Transitions from photon interactions in quantum-well semiconductors are governed by the energy gaps between subbands, as opposed to the general energy gap of classical semiconductors.

Motivation

The conceptual design of a Field Effect Transistor (FET) was first formulated in 1930 by J. E. Lilienfeld.^[16] Since the advent of the first Silicon FET 30 years later, the electronics industry has seen rapid and predictable exponential growth of both transistor density and information processing capability. This phenomenon, known as Moore's Law, refers to the observation that the number of transistors that can be placed in an integrated circuit doubles approximately every two years.

High Speed Quantum FETs were designed to overcome the 0.2 μm technology considered to be the practical limit for conventional semiconductor technology. QFETs thus increase the logic speed by a factor of ten, and reduce the power requirements and size of the transistor by the same factor. These increases lend QFET devices for use in developing design-automation tools that benefit from low power, small size, and high speed.^[17] Recently, Topological Quantum Field Effect Transistor (TQFET) has opened a new paradigm for low-energy switching due to intrinsic quantum phenomena. TQFET has an ability to overcome Boltzmann tyranny owning to the Rahsba effect^[18] and negative capacitance effect^[19] and also promise miniaturization via quantum confinement effects^[20].

 

See also

• List of MOSFET applications
• Quantum computing
• Quantum well

References

1. Datta, Kanak; Khosru, Quazi D. M. (1 April 2016). "III–V tri-gate quantum well MOSFET: Quantum ballistic simulation study for 10nm technology and beyond". Solid-State Electronics. 118: 66–77. arXiv:1802.09136. Bibcode:2016SSEle.118...66D. doi:10.1016/j.sse.2015.11.034. ISSN 0038-1101. S2CID 101934219.
2. Kulkarni, Jaydeep P.; Roy, Kaushik (2010). "Technology/Circuit Co-Design for III-V FETs". In Oktyabrsky, Serge; Ye, Peide (eds.). Fundamentals of III-V Semiconductor MOSFETs. Springer Science & Business Media. pp. 423–442. doi:10.1007/978-1-4419-1547-4_14. ISBN 978-1-4419-1547-4.
3. Lin, Jianqiang (2015). InGaAs Quantum-Well MOSFETs for logic applications (Thesis). Massachusetts Institute of Technology. hdl:1721.1/99777.
4. "WHAT'S NEWS: A review of the latest happenings in electronics", Radio-Electronics, Gernsback, vol. 62, no. 5, May 1991
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10. Madou, Marc J. (2011). Manufacturing Techniques for Microfabrication and Nanotechnology. Hoboken: CRC Press. ISBN 978-1-4200-5521-4. OCLC 908077421.
11. Lin, Jianqiang (2015). InGaAs Quantum-Well MOSFETs for logic applications (Thesis thesis). Massachusetts Institute of Technology. hdl:1721.1/99777.
12. "The Quantum Particle in a Box" (PDF). ocw.mit.edu. MIT OpenCourseWare.{{cite web}}: CS1 maint: others (link)
13. Tsurumi, Takaaki (10 December 2009). Nanoscale physics for materials science. Boca Raton, Fla. ISBN 978-1-4398-0060-7. OCLC 862039542.{{cite book}}: CS1 maint: location missing publisher (link)
14. "Nanowire Diameter - an overview | ScienceDirect Topics". www.sciencedirect.com. Retrieved 2020-11-23.
15. "DoITPoMS - TLP Library Introduction to Semiconductors - Direct and Indirect Band Gap Semiconductors". www.doitpoms.ac.uk. Retrieved 2020-11-23.
16. Frank, David; Dennard, Robert; Nowak, Edward; Solomon, Paul; Taur, Yuan; Wong, Hon-Sum (2001). Device Scaling Limits of Si MOSFETs and Their Application Dependencies. IEEE.
17. Radio Electronics (May 1991). May 1991.
18. Nadeem, Muhammad; Di Bernardo, Iolanda; Wang, Xiaolin; Fuhrer, Michael S.; Culcer, Dimitrie (2021-04-14). "Overcoming Boltzmann's Tyranny in a Transistor via the Topological Quantum Field Effect". Nano Letters. 21 (7): 3155–3161. doi:10.1021/acs.nanolett.1c00378. ISSN 1530-6984.
19. Fuhrer, M.S.; Edmonds, M.T.; Culcer, D.; Nadeem, M.; Wang, X.; Medhekar, N.; Yin, Y.; Cole, J.H (2021-12-11). "Proposal for a Negative Capacitance Topological Quantum Field-Effect Transistor". IEEE: 38.2.1–38.2.4. doi:10.1109/IEDM19574.2021.9720587. ISBN 978-1-6654-2572-8. {{cite journal}}: Cite journal requires |journal= (help)
20. Nadeem, Muhammad; Zhang, Chao; Culcer, Dimitrie; Hamilton, Alex R.; Fuhrer, Michael S.; Wang, Xiaolin (2022-01-26). "Optimizing topological switching in confined 2D-Xene nanoribbons via finite-size effects". Applied Physics Reviews. 9 (1). doi:10.1063/5.0076625. ISSN 1931-9401.