The MaverickCrunch is a floating point math coprocessor core intended for digital audio. It was first presented by Cirrus Logic in June 2000[1] together with an ARM920T integer processor in their 200 MHz EP9302 EP9307 EP9312 and EP9315 System-on-Chip integrated circuits. Plagued with hardware bugs and poor compiler support, it was seldom used in any of the devices based on those chips and the product line was discontinued on April 1, 2008.
A Cirrus Logic EP9315 chip containing a MaverickCrunch FPU
The coprocessor has 16 64-bit registers which can be used for 32- or 64-bit integer and floating point operations and its floating point format is based on the IEEE-754 standard. It has its own instruction set which performs floating point addition, subtraction, multiplication, negation, absolute value, and comparisons as well as addition, multiplication and bit shifts on integers. It also has four 72-bit registers on which can perform a 32-bit multiply-and-accumulate instruction and a status register, as well as conversions between integer and floating point values and instructions to move data between itself and the ARM registers or memory.
It operates in parallel with the main processor, both processors receiving their instructions from a single 32-bit instruction stream. Thus, to use it efficiently, integer and floating point instructions must be interleaved so as to keep both processors busy.
Hardware bugsedit
Five versions of the EP93xx silicon were issued: "D0" and "D1"/"E0"/"E1" and "E2", with major revisions to the MaverickCrunch core between D0 and D1 to fix its worst bugs. All have a dozen or more hardware bugs which either give imprecise or garbage results or clobber registers or memory when certain sequences of instructions are executed in a certain order.
Compiler supportedit
A set of patches was submitted to the GNU Compiler Collection by Red Hat/Cygnus Solutions in 2003 to include a code generator for it, complete with flags to work around its defects. However, these never worked well enough for it to be usable. It was removed by GCC 4.8 (Sept. 2012).[2]
Several attempts have been made to fix this work:
Cirrus Logic's , a repackaging of GNU tools modified by Nucleusys of Bulgaria (or was it they who did the work later submitted by RedHat?)
The futaris patches for gcc 4.1.2 and 4.2.0, packaged for Open Embedded
Martin Guy's gcc-crunch patches and native compilers, a development of the futaris patches, which generate reliable code and pass all testsuites.
Referencesedit
^Klaas, Jeff. "Introducing Maverick EP9312". Retrieved on 2009-03-03. 2009-12-31 at the Wayback Machine, presented at the Embedded Processor Forum, San Jose, California, June 13, 2000.
^Richard Earnshaw in GCC mailing list re removal of FPA and Crunch support
External linksedit
Chapter 2 of the
[1] Reportedly many issues with the implementation on the chip.
Cirrus Logic's Errata for EP93XX
A detailed article on the Debian Wiki exploring its problematic features, hardware bugs and the state of GCC support.
Patched versions of GCC capable of generating reliable MaverickCrunch code
Debian packages recompiled with MaverickCrunch acceleration
April 28, 2024
maverickcrunch, floating, point, math, coprocessor, core, intended, digital, audio, first, presented, cirrus, logic, june, 2000, together, with, arm920t, integer, processor, their, ep9302, ep9307, ep9312, ep9315, system, chip, integrated, circuits, plagued, wi. The MaverickCrunch is a floating point math coprocessor core intended for digital audio It was first presented by Cirrus Logic in June 2000 1 together with an ARM920T integer processor in their 200 MHz EP9302 EP9307 EP9312 and EP9315 System on Chip integrated circuits Plagued with hardware bugs and poor compiler support it was seldom used in any of the devices based on those chips and the product line was discontinued on April 1 2008 A Cirrus Logic EP9315 chip containing a MaverickCrunch FPU Contents 1 Features 2 Hardware bugs 3 Compiler support 4 References 5 External linksFeatures editThe coprocessor has 16 64 bit registers which can be used for 32 or 64 bit integer and floating point operations and its floating point format is based on the IEEE 754 standard It has its own instruction set which performs floating point addition subtraction multiplication negation absolute value and comparisons as well as addition multiplication and bit shifts on integers It also has four 72 bit registers on which can perform a 32 bit multiply and accumulate instruction and a status register as well as conversions between integer and floating point values and instructions to move data between itself and the ARM registers or memory It operates in parallel with the main processor both processors receiving their instructions from a single 32 bit instruction stream Thus to use it efficiently integer and floating point instructions must be interleaved so as to keep both processors busy Hardware bugs editFive versions of the EP93xx silicon were issued D0 and D1 E0 E1 and E2 with major revisions to the MaverickCrunch core between D0 and D1 to fix its worst bugs All have a dozen or more hardware bugs which either give imprecise or garbage results or clobber registers or memory when certain sequences of instructions are executed in a certain order Compiler support editA set of patches was submitted to the GNU Compiler Collection by Red Hat Cygnus Solutions in 2003 to include a code generator for it complete with flags to work around its defects However these never worked well enough for it to be usable It was removed by GCC 4 8 Sept 2012 2 Several attempts have been made to fix this work Cirrus Logic s Crunch tools a repackaging of GNU tools modified by Nucleusys of Bulgaria or was it they who did the work later submitted by RedHat The futaris patches for gcc 4 1 2 and 4 2 0 packaged for Open Embedded Martin Guy s gcc crunch patches and native compilers a development of the futaris patches which generate reliable code and pass all testsuites References edit Klaas Jeff Introducing Maverick EP9312 Retrieved on 2009 03 03 Archived 2009 12 31 at the Wayback Machine presented at the Embedded Processor Forum San Jose California June 13 2000 Richard Earnshaw in GCC mailing list re removal of FPA and Crunch supportExternal links editChapter 2 of the EP9307 Users Guide Optimizing Code Speed for the MaverickCrunch Coprocessor 1 Reportedly many issues with the implementation on the chip Cirrus Logic s Errata for EP93XX A detailed article on the Debian Wiki exploring its problematic features hardware bugs and the state of GCC support Patched versions of GCC capable of generating reliable MaverickCrunch code Debian packages recompiled with MaverickCrunch acceleration Retrieved from https en wikipedia org w index php title MaverickCrunch amp oldid 1207092393, wikipedia, wiki, book, books, library,
